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Capacitive Sensing Method for Integrated Circuit Identification and Authentication

Engineering & Physical Sciences
Electronics
Digital Integrated Circuits
Testing & Measurement
College
College of Engineering (COE)
Researchers
Khalil, Waleed
Kines, Michael
Licensing Manager
Hong, Dongsung Hong.923@osu.edu

T2020-069 A method of authenticating an IC die’s origin and uniquely identifying each die with an intrinsic unclonable value through measurement of on-chip capacitance values

The Need

Hardware security in Integrated Circuit (IC) designs is of increasing importance in dealing with the insecure, expanding global supply chain of these parts. The ability to trace the origin of a die, combined with the capability to uniquely identify each die provides valuable quantitative measures of trust in the device’s proper operation and performance. Additionally, self-detection of IC die tampering and/or malicious circuit insertions (e.g. Trojans) provides a continuous measure of hardware trust throughout a device’s operation in an uncontrolled environment.

Some current practices in hardware security rely on expensive top layer protective coatings of randomly distributed conductive particles within a dielectric material to encapsulate a die. These randomly distributed conductive particles form unique capacitances, which are measured by the underlying die to form a unique, unpredictable identification value. Any attempts to cut through this protective top layer to modify the die underneath will alter the capacitances and therefore the identification value. While this method helps to prevent malicious insertions or modifications after die fabrication and encapsulation, it does not provide any information on the origin fabrication facility nor does its unique identification rely on the traditional process steps of IC fabrication.

Other practices utilize single-bit, differential measurement of capacitances formed through the special layout of metal lines within the top metal layers of the die. These practices are impractical due to the extremely unwieldy area overhead in the metal layer routing and the lack of security in single-bit, differential outputs. This method does not provide any trace to the origin of the die fabrication nor does it reveal the presence of circuit tampering during the original fabrication of each device. Circuit tampering attempts made after die fabrication are only detected if the tampering happens to reverse the polarity of the differential capacitance measurement. Thus, many alterations would remain undetected.

The Technology

A team of researchers at The Ohio State University led by Dr. Waleed Khalil has developed a method of authenticating each die’s origin and uniquely identifying each die with an intrinsic unclonable value through measurement of on-chip capacitance values. Each foundry has a specific process flow that results in different distributions of capacitance formed as a result of power supply and interconnect metal layer routing. These capacitive distributions coupled with the resistive leakage from these lines relay foundry-specific information. This information can then be used to authenticate the origin of a particular IC after fabrication, without relying on any process control monitoring data or die marcation. All foundry processes also have uncontrollable random variations that manifest themselves as differing values of capacitance within the metal routing on the die. Measuring these capacitance values and the resistive leakage from these lines provides a unique, unclonable identification for each die. The unique die identification can be used to prevent overproduction and black market sales of ICs.

Commercialization

  • Defense & Security
  • Networking & Communications

Benefits

  • Can authenticate a die’s origin
  • Can uniquely identify each die with an intrinsic unclonable value
  • Can detect malicious tampering with back-end-of-line (BEOL) processing steps