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A Lightweight Low Inductance Power Module with Insulated Baseplates

Engineering & Physical Sciences
Electronics & Photonics
Semiconductors, Circuits, & Electronic Components
College
College of Engineering (COE)
Researchers
Lyu, Xintong
Wang, Jin
Licensing Manager
Ashouripashaki, Mandana
5125867192
ashouri.2@osu.edu

T2020-054 A lightweight power module that reduces loop stray inductance while maintaining good electrical insulation and thermal dissipation.

The Need

In conventional power module structures, the die is attached to the substrate, usually direct bonding copper (DBC). The ceramic substrate layer provides electrical insulation between the circuit and cooling structure and attaches to a conductive baseplate material (Cu, Al, AlSiC) to dissipate heat. In this conventional configuration, the power loop stray inductance is large so the layered structure from semiconductor dies to the heatsink results in relatively high thermal resistance.

The voltage overshoot and oscillation results from the stored energy in the stray inductance of the power loop. Under high current and high-speed switching, voltage overshoot requires sufficient voltage margins of the power devices. Higher voltage rating devices result in additional cost, higher conduction losses, and lower overall efficiency. Thus, the power loop inductance reduction is critical for high switching speed high-efficiency operation with low overshoot voltage. By decreasing the effective power loop area, the power loop inductance can be reduced. Thus, there is a need for a power module design that reduces inductance resulting in a reduced need for heat dissipation which will increase the power density of the module and reduce the overall weight.

The Technology

Xintong Lyu has developed a novel design for power modules which reduces inductance and voltage overshoot. This is accomplished by utilizing a vertical loop with a half-bridge structure with integrated decoupling capacitors. The new layout can fully utilize the conducting area on the substrate. This technology can be easily paralleled for a high current rating power module. Multi-chip paralleling of this basic unit provides symmetrical loop inductance among the dies and eliminates the imbalanced current sharing problem brought by packaging. When implementing the vertical loop design, the bottom conduction layer of the substrate conducts current and experiences voltage potential. This technology also features a novel cooling structure to dissipate this heat from the substrate.

Commercialization

  • Vehicle power modules
    • Aircraft
    • Automobile

Benefits

  • Lightweight
  • Low inductance
  • Low overshoot
  • Vertical loop power module with insulated baseplate